Code-Disjoint Circuits for Parity Codes
نویسندگان
چکیده
In this paper it is shown how a circuit, given as a net-list of gates, can be transformed into two diierent types of code-disjoint circuits. A new method for a joint design of the functional circuit, the output parity and the input parity is proposed. Carefully selected internal nodes of the functional circuit are utilized to reduce the necessary area overhead for the design of input and output parities.
منابع مشابه
Probability propagation and decoding in analog VLSI
The sum-product algorithm (belief/probability propagation) can be naturally mapped into analog transistor circuits. These circuits enable the construction of analog-VLSI decoders for turbo codes, low-density parity-check codes, and similar codes.
متن کاملAn approach to fault detection and correction in design of systems using of Turbo codes
We present an approach to design of fault tolerant computing systems. In this paper, a technique is employed that enable the combination of several codes, in order to obtain flexibility in the design of error correcting codes. Code combining techniques are very effective, which one of these codes are turbo codes. The Algorithm-based fault tolerance techniques that to detect errors rely on the c...
متن کاملFault Tolerant Design of Combinational and Sequential Logic Based on a Parity Check Code
We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check codes and duplication in order to not only perform error detection but also provide diagnosis and correction capabilities. Informed selection among the outputs of the original synthesized circuit and the outputs of a const...
متن کاملRate-Compatible LDPC Codes
We present a new class of irregular low-density parity-check (LDPC) codes for moderate block lengths (up to a few thousand bits) that are well-suited for rate-compatible puncturing. The proposed codes show good performance under puncturing over a wide range of rates and are suitable for usage in incremental redundancy hybrid-automatic repeat request (ARQ) systems. In addition, these codes are l...
متن کاملFault-Secure Parity Prediction Arithmetic Operators
units (adders, ALUs, multipliers, dividers) are essential to fault-tolerant computer designs. Some researchers based early design schemes for such units on arithmetic residue codes.1 Others proposed parity prediction schemes for the same purpose.2 These schemes compute the output operand’s parity as a function of the operator’s internal carries and of the input operands’ parities. The basic dra...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2007